The growing computational complexity and data rate requirements of new multimedia applications demand that signal processing systems provide efficient and flexible compression and decompression routines. With a plurality of image and video coding and decoding standards available, the signal processing system may have to be flexible enough to implement at least one of these standards. Examples of image and video coding and decoding standards that may be used in various user devices comprise Joint Photographic Experts Group (JPEG), Moving Picture Experts Group (MPEG), and H.263 standard published by the International Telecommunications Union (ITU).
The JPEG standard utilizes a lossy compression technique for compressing still images based on the discrete cosine transform (DCT) and the inverse cosine transform (IDCT) for coding and decoding operations respectively. The JPEG standard is rarely used in video, but it forms the basis for motion-JPEG (M-JPEG) which may be used in desktop video editing and digital video (DV) compression, a compression and data packing scheme used in consumer digital video cassette recorders and their professional derivatives. In the JPEG standard an 8×8 array of sample data known as a video data block may be used for processing, where the sample data may correspond to luminance (Y) or chrominance (Cr and Cb) information of the still image or video signal. Four 8×8 blocks of luminance, an 8×8 block of Cr, and an 8×8 block of Cb data is known in JPEG terminology as a minimum coded unit (MCU) and it corresponds to a macroblock in DV or MPEG terminology.
The MPEG standard is also based on the DCT/IDCT pair and may provide intraframe or interframe compression. In interframe compression, there may be an anchor or self-contained image in a video field that provides a base value and succeeding images may be coded based on their differences to the anchor. In intraframe compression, each image in a video field is compressed or coded independently from any other image in a video sequence. The MPEG standard specifies what may constitute a legal bitstream, that is, it provides guidelines as to what is a conformant encoder and decoder but does not standardize how an encoder or a decoder may accomplish the compression or decompression operations respectively.
The H.263 standard may support video coding and decoding for video-conferencing and video-telephony application. Video-conferencing and video-telephony may have a wide range of wireless and wireline applications, for example, desktop and room based conferencing, video over the Internet and over telephone lines, surveillance and monitoring, telemedicine, and computer-based training and education. Like MPEG, the H.263 standard specifies the requirements for a video encoder and decoder but does not describe the encoder and decoder themselves. Instead, the H.263 standard specifies the format and content of the encoded bitstream. Also like MPEG and JPEG, the H.263 standard is also based on the DCT/IDCT pair for coding and decoding operations.
The encoding and decoding operations specified by, for example, the JPEG, MPEG, and H.263 standards may be implemented in software to be run on signal processing integrated circuits (IC) with embedded processors such as systems-on-a-chip (SoC). These SoC image and video (IV) solutions need to be highly effective in terms of performance, cost, power and flexibility. However, processor-based SoC devices where these operations may run efficiently are proving difficult to implement. This difficulty arises because system software and/or other data processing applications executed on the embedded processor demand a large portion of the computing resources available on the SoC, limiting the ability of the coding and decoding operations to be performed as rapidly as may be required for a particular data transmission rate.
In addition, decoding operations specified by, for example, the JPEG, MPEG, and H.263 standards, may utilize computation-intensive algorithms, such as a Huffman decoding algorithm. In this regard, Huffman decoding may utilize a large portion of on-chip computing and memory resources, which may increase processing time and decrease overall system efficiency. The use of embedded digital signal processors (DSP) in an SoC design may provide the increased computational speed needed to execute coding and decoding software using Huffman encoding/decoding algorithms. However, this approach may prove to be costly because an embedded DSP is a complex hardware resource that may require a large portion of the area available in an SoC design. Furthermore, additional processing hardware, for example an embedded processor or a microcontroller, may still be required to provide system level control and/or other functions for the signal processing IC.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.